nano-Threads
C. Polychronopoulos, D. Schouten, J. Moreira, H. Saito
U.S. Office of Naval Research, ONR 3332761-01
(Conducted in the Coordinated Science Laboratory)
This project involves the design and prototyping of a novel threads architecture for parallel computers. nano-Threads provides the ability to form and schedule parallel activities of a user program within the address space of that program. No system interaction is necessary for user-level entities. The effect of this approach is significant
reduction in run-time overhead and improved performance through the exploitation of hierarchical parallelism. Other major features of nano-Threads include adaptive thread-granularity, scalable binaries, and harmonious integration of multiprogramming and parallel processing.
N. Stavrakos, H. Saito
This project involves the development of a powerful multilingual parallelizing compiler that supports user-level threads. Parafrase-2 has been operational for several years and in use at more than 60 sites worldwide. This is an ongoing project involving the design and implementation of new program optimization and restructuring techniques. The major current implementation focus is on symbolic program and dependence analysis. Initial results suggest that the effectiveness of parallelization through symbolic analysis can be improved in a dramatic way. A sophisticated graphical user interface for the compiler is also under development.
M. Haghighat
The effectiveness of high-performance compilers derives from their ability to exploit the available parallelism in programs. The exploitation of parallelism requires elegant techniques for discovery of certain program properties. In particular, the dependence information has a key role in detection of parallelism. We are building a very precise flow analysis framework for the Parafrase-2 compiler. Within this framework, symbolic analysis solves a variety of flow analysis problems in a unified way. The attained solution space of these problems is much larger than that handled by existing compilers. Symbolic analysis also serves as a basis for code optimization and parallel loop scheduling.
J. E. Moreira
The goal of this project is to develop low-level algorithms and hardware for efficiently supporting parallel task scheduling and synchronization in multiprocessors. Efficient parallel task management is crucial to the exploitation of large amounts of parallelism in future high-performance machines, future parallelizing compilers and run-time libraries will assume more of the responsibility for parallel task management within concurrent programs, and that they will promote the use of high-level data flow concepts. We have proposed a processor architecture with hardware support for macro-dataflow-style execution of independent instruction. Currently, work focuses on the performance aspects of this architecture and the design of a specialized network.
G. Dimitriou
This project considers the scheduling problem for multiprogrammed multiprocessor systems. It involves the design and evaluation of fair scheduling methods for multiprogramming on a multiprocessor system. The problem is complex, and there are conflicting goals. If an emphasis is placed on system throughput, the scheduling policies are quite different from the emphasis being placed on individual job turnaround time. The goal is to provide a flexible scheduling methodology that is both fair and efficient that can be tuned for a specific emphasis. A number of algorithms have already been developed and simulated. All cases focus on integrating parallel processing and multiprogramming, and our initial results appear to be very encouraging. 1